DMP supports storage arrays using ALUA standard. From Veritas InfoScale 7.1 onwards, DMP supports multi-controller (more than 2 controllers) ALUA compliant arrays.
For ALUA arrays, the dmp_display_alua_states
tunable parameter displays the asymmetric access state of the Logical Unit (LUN) instead of PRIMARY or SECONDARY in the PATH-TYPE[M] column.
To view asymmetric access states of an ALUA LUN, enter:
# vxdmpadm getsubpaths dmpnodename=dmpnode_name
Typical output is as follows:
# vxdmpadm getsubpaths dmpnodename=emc_clariion0_786 NAME STATE[A] PATH-TYPE[M] CTLR-NAME ENCLR-TYPE ENCLR-NAME ATTRS ======================================================================================== hdisk40 ENABLED Active/Non-Optimized fscsi0 EMC_CLARiiON emc_clariion0 - hdisk58 ENABLED Active/Non-Optimized fscsi1 EMC_CLARiiON emc_clariion0 - hdisk67 ENABLED(A) Active/Optimized(P) fscsi1 EMC_CLARiiON emc_clariion0 - hdisk77 ENABLED(A) Active/Optimized(P) fscsi0 EMC_CLARiiON emc_clariion0 -
Note: |
In the output, (P) signifies that the path is connected to the target port group marked as preferred by the device server. |
All VxVM/DMP outputs which earlier displayed PRIMARY or SECONDARY in the PATH-TYPE[M] column will now display the asymmetric access state.
If you want to go back to the previous version of the CLI output which displays PRIMARY or SECONDARY in the PATH-TYPE[M] column, enter the following command to disable the dmp_display_alua_states
tunable parameter:
# vxdmpadm settune dmp_display_alua_states=off
The tunable value changes immediately.